This invention relates to on-chip generation of substrate bias voltage for semiconductor integrated circuit devices, and particularly by means for regulating the substrate bias voltage.
Some integrated circuits utilizing MOS (Metal Oxide Semiconductor) field effect transistors require a substrate bias to avoid unwanted conduction of parasitic junction diodes or parasitic MOS transistors. Substrate bias generators in common use generate the required bias from a charge pumping circuit that operates from the dc supply. Examples of some substrate bias generators and charge pumps are disclosed in the following:
U.S. Pat. No. 4,115,710 PA0 U.K. patent application No. GB 2,028,553A PA0 U.K. patent application No. GB 2,001,494A PA0 U.S. defensive publication No. T 954,006
Typically in the prior art circuits, the intent is to pump sufficient charge into the substrate until the threshold voltage of a MOS transistor, either depletion or enhancement type, equals a predetermined value and thereafter to maintain the threshold voltage at that value by controlling the charge pumping. Thus, while the threshold voltage may remain substantially fixed at the predetermined value, the substrate bias voltage is allowed to vary over a wide range to compensate for other variable factors which may affect the threshold voltage, such as operating temperature or process parameters.